The present invention relates to a semiconductor device having memory circuits.
Memory-logic LSIs (system LSIs) have been popular recently. These LSIs are used to constitute a specific system by mounting memory circuits and logic circuits on one chip. Circuits that are usually mounted on separate chips are mounted on one chip for memory-logic LSIs, thus requiring higher performance, lower power consumption and miniaturization (reduction of components).
There are two types for memory-logic LSIs. One is a custom LSI having custom logic and memory circuits. The other type is a ASIC (Application Specific IC) that is a semi-custom LSI having memory circuits (memory macro cells) designed as function blocks.
ASICs are very popular for their flexibility to a variety of users' demands because they can be rearranged in a short turn around time.
As memory macro cells for ASICs, re-configurable memory macro cells have been developed.
Re-configurable memory macro cells are, however, disadvantageous in high cost for testing each macro cell due to different test programs for a plurality of different types of products using memory macro cells configured differently.
Moreover, memory macro cells cannot be tested at the same time due to different address spaces for a plurality of memory macro cells mounted on a one-chip memory-logic LSI.